Herbert Xu wrote: > On Wed, Jun 17, 2009 at 10:06:44AM -0700, H. Peter Anvin wrote: > >> Huang: if I recall correctly, these functions were originally designed >> to deal with the fact that VIA processors generate spurious #TS faults >> due to broken design of the Padlock instructions. The AES and PCLMUL >> instructions actually use SSE registers and so will require different >> structure. > > No irq_ts_save was the one designed for the VIA, the Intel stuff > does save the FPU state. > Ah, sorry, misremembered. Great! Will apply. -hpa -- H. Peter Anvin, Intel Open Source Technology Center I work for Intel. I don't speak on their behalf. -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
