Dear Arjan, On Mon, May 11, 2009 at 02:12:17AM +0200, Arjan Koers wrote: > Harald Welte wrote: > > This is a cosmetic change, fixing the MODULE_DESCRIPTION() of via-rng.c > > Coincidentally, I was trying to make my RNG work for x86_64 today and I > was wondering about this. I like those coincidences :) > How can multiple RNGs in current dual-processor setups and in the future > multicore Nano be handled? That's actually a good question. I'll probably forward that to the CPU division and see what they come up with. I would assume you just run the initialization on every CPU, and that's it. Now the more interesting question is: how can the hw_random framework deal with it? As far as I remember, it can only select one out of N available concurrent providers of hardware randomness. correct? > The MSR wizardry in via_rng_init doesn't seem to work on my Nano. This is due to the fact that the MSR itself does no longer exist on the Nano. It only exists on C3 to C7 silicon. > I'm simply skipping it with the patch below, because my RNG is enabled by > default. yes, this is the correct method. On Nano you only have to see if it is enabled in CPUID and forget about > I don't know the proper way to initialize it because of lacking > documentation. the quick reference for padlock on the nano is public, despite not at a very well-known location: ftp://ftp.vtbridge.org/Docs/CPU/Nano/padlock_quick_reference_V095.pdf -- - Harald Welte <HaraldWelte@xxxxxxxxxxx> http://linux.via.com.tw/ ============================================================================ VIA Open Source Liaison -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
