On Sun, Dec 14, 2008 at 07:38:42PM -0800, Herbert Xu wrote: > On Mon, Dec 15, 2008 at 10:19:02AM +0800, Huang Ying wrote: > > > > The general x86 implementation is used as the fall back for new AES-NI > > based implementation. Because AES-NI can not be used in kernel soft_irq > > context. If crypto layer is used to access general x86 implementation, > > Why is that? The VIA PadLock also "touches" the SSE state but we still > use it on softirq paths. > > In fact Suresh told me earlier that your AES instruction wasn't > going to have the SSE problems that VIA had, is this not the case? As Huang mentioned, AES instructions touch SSE registers and thus have different requirements. I agree that we have to do some performance analysis to come up with the optimized model. thanks, suresh -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html