On Mon, Dec 15, 2008 at 01:14:59PM +0800, Huang Ying wrote: > > The PadLock instructions don't use/touch SSE registers, but might cause > DNA fault when CR0.TS is set. So it is sufficient just to clear CR0.TS > before executed. > > The AES-NI instructions do use SSE registers. Considering the following This really sucks as more than half of the kernel AES users are in softirq context. Someone hit the guy who designed this with a clue-bat please! > To solve the above issue, the following methods can be used: > > a. Do not touch SSE state in soft_irq > b. Disable/restore soft_irq in kernel_fpu_begin/kernel_fpu_end > c. Use a per-CPU data structure to save kernel FPU state during > soft_irq. > > The mothod a is used in patch. Could you run the tcrypt speed test on this and measure the difference between the native AES vs. the fallback? Depending on the difference I think we'd want to consider b) or c). Of course the best solution would be to fix the hardware. Cheers, -- Visit Openswan at http://www.openswan.org/ Email: Herbert Xu ~{PmV>HI~} <herbert@xxxxxxxxxxxxxxxxxxx> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
