On Fri, May 30, 2008 at 03:48:20PM -0500, Kim Phillips (kim.phillips@xxxxxxxxxxxxx) wrote: > sorry, by ISR I meant interrupt status registers. but I can't tell > where the suspected simultaneous accesses are. Evgeniy, can you point > out the register accesses you're talking about? priv->status is accessed from tasklets, although readonly, but that rises a red flag... Also callback invocation tasklet drops the lock around callback, during that time cached status and priv itself (and tail like in two simultaneous flushes) could change (or not?) -- Evgeniy Polyakov -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html