Re: [RFC] [crypto] padlock-aes loadkey ondemand

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* Herbert Xu | 2008-04-02 14:50:15 [+0800]:

>On Wed, Apr 02, 2008 at 08:44:19AM +0200, Sebastian Siewior wrote:
>>
>> Herbert: I was going to Cc you and ask if the speed improvements are
>> okey / enough to consider this patch for inclusion but I see now that
>> you found this thread on your own :) Do you want me to form a patch? 
>
>Yes please! BTW, can VIA do SMP? If so then we'll need some code
>to deal with that and if not, we should add a run-time check to
>fail the module insertion if ever such a beast should arise.
I'm not sure if they have SMP or multicore out / plans but I gave a
little thought on this early morning: The only problem is if we get
swapped to another cores before encryption process beginns and after key
reset thing. If the scheduler decides to swap cores than EFLAGS should
be reloaded and wer are fine. The only problem that I see with cpus > 1
is that we might reload the key if it is not required. This could be
solved with old_ctx pointer beeing a percpu. 

>Cheers,
Sebastian
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