Hi Geert, Thanks for the feedback. > -----Original Message----- > From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> > Sent: 17 March 2025 09:54 > Subject: Re: [PATCH v4 08/11] can: rcar_canfd: Add shift table to struct rcar_canfd_hw_info > > Hi Biju, > > On Sun, 16 Mar 2025 at 18:02, Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote: > > > From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> On Sat, 15 Mar 2025 > > > at 18:31, Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote: > > > > > From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> On Thu, 6 Mar > > > > > 2025 at 13:43, Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote: > > > > > > R-Car Gen3 and Gen4 has some differences in the shift bits. > > > > > > Add a shift table to handle these differences. After this drop > > > > > > the unused functions reg_gen4() and is_gen4(). > > > > > > > > > > > > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > > > > > > > > > > Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> > > > > > > > > > > A suggestion for improvement below. > > > > > > > > > > > --- a/drivers/net/can/rcar/rcar_canfd.c > > > > > > +++ b/drivers/net/can/rcar/rcar_canfd.c > > > > > > @@ -90,11 +90,13 @@ > > > > > > /* RSCFDnCFDGAFLCFG0 / RSCFDnGAFLCFG0 */ #define > > > > > > RCANFD_GAFLCFG_SETRNC(gpriv, n, x) \ > > > > > > (((x) & (gpriv)->info->mask_table[RCANFD_RNC_MASK]) << \ > > > > > > - (reg_gen4(gpriv, 16, 24) - ((n) & 1) * reg_gen4(gpriv, 16, 8))) > > > > > > + ((gpriv)->info->shift_table[RCANFD_FIRST_RNC_SH] - ((n) & 1) * \ > > > > > > + (gpriv)->info->shift_table[RCANFD_SECOND_RNC_SH])) > > > > > > > > > > Both shifts are dictated by the field width: > > > > > - R-Car Gen4 packs 2 values in a 32-bit word, using a field width > > > > > of 16 bits, > > > > > - R-Car Gen3 packs up to 4 values in a 32-bit word, using a field > > > > > width of 8 bits. > > > > > The odd split in two shifts is due to the MSB-first numbering of > > > > > the fields. Hence I think it would be better to use a field > > > > > width parameter, and derive the proper shift value from that > > > > > (like you have already done for ICU ;-) > > > > > > > > > > Note that the formula will have to be reworked anyway to support > > > > > the third channel on R-Car V3H_2, as "n & "1 will no longer fly here... > > > > > > > > Agreed. Will introduce rnc_field_width variable in struct > > > > rcar_canfd_hw_info and Simplify the calculation using the formula (32 - (n + 1) * > rnc_field_width). > > > > Which will work for third channel on R-Car V3H_2 as well. > > > > > > Note that you still need to mask n, as n can be up to 7 (on R-Car > > > V4H), while the register holds only > > > 2 or 4 values. > > > > OK, will add separate patch for fixing > > > > -#define RCANFD_GAFLCFG(ch) (0x009c + (0x04 * ((ch) / 2))) > > +#define RCANFD_GAFLCFG(ch, n) (0x009c + (0x04 * ((ch) / (n)))) > > > > Where n is gpriv->info->rnc_per_reg. > > I think you better pass gpriv instead of n, i.e. RCANFD_GAFLCFG(gpriv, ch), for consistency with other > macros. Agreed. > > > and SETRNC is simplified to > > > > #define RCANFD_GAFLCFG_SETRNC(gpriv, n, x) \ > > (((x) & ((gpriv)->info->num_supported_rules - 1)) << \ > > - (reg_gen4(gpriv, 16, 24) - ((n) & 1) * reg_gen4(gpriv, 16, 8))) > > + (32 - (((n) % (gpriv)->info->rnc_per_reg + 1) * > > + (gpriv)->info->rnc_field_width))) > > FTR, gpriv->info->rnc_per_reg == 32 / gpriv->info->rnc_field_width. Agreed. Sure, I will change accordingly. Cheers, Biju
