RE: [PATCH 00/11] Add support for RZ/G3E CANFD

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Hi Marc,

Thanks for the feedback.

> -----Original Message-----
> From: Marc Kleine-Budde <mkl@xxxxxxxxxxxxxx>
> Sent: 18 February 2025 11:19
> Subject: Re: [PATCH 00/11] Add support for RZ/G3E CANFD
> 
> On 18.02.2025 10:49:50, Biju Das wrote:
> > The CAN-FD module on RZ/G3E is very similar to the one on both R-Car
> > V4H and RZ/G2L, but differs in some hardware parameters:
> >  * No external clock, but instead has ram clock.
> >  * Support up to 6 channels.
> >  * 20 interrupts.
> >
> > Biju Das (11):
> >   clk: renesas: r9a09g047: Add CANFD clock/reset
> >   dt-bindings: can: renesas,rcar-canfd: Fix typo in pattern properties
> >     for R-Car V4M
> >   dt-bindings: can: renesas,rcar-canfd: Simplify the conditional schema
> >   dt-bindings: can: renesas,rcar-canfd: Document RZ/G3E support
> >   can: rcar_canfd: Fix page entries in the AFL list
> >   can: rcar_canfd: Add gen4_type variable to struct rcar_canfd_hw_info
> >   can: rcar_canfd: Add only_internal_clks variable to struct
> >     rcar_canfd_hw_info
> >   can: rcar_canfd: Enhance multi_channel_irqs handling
> >   can: rcar_canfd: Add RZ/G3E support
> >   arm64: dts: renesas: r9a09g047: Add CANFD node
> >   arm64: dts: renesas: r9a09g047e57-smarc: Enable CANFD
> 
> Please send the dts changes as a separate series, too. They will probably go mainline via the renesas
> SoC tree.

Agreed. Clk, dts as separate series.

Cheers,
Biju




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