The driver now requests that the bit rate configuration should use a
single (common) BRP for both CAN FD bit rates by setting statically the
CAN_CTRLMODE_FD_COMMON_BRP.
This is needed because the esdACC CAN controller has only a single BRP
for both bit rates.
Signed-off-by: Stefan Mätje <stefan.maetje@xxxxxx>
---
drivers/net/can/esd/esd_402_pci-core.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/net/can/esd/esd_402_pci-core.c b/drivers/net/can/esd/esd_402_pci-core.c
index 1152182aa64a..29ffa152097a 100644
--- a/drivers/net/can/esd/esd_402_pci-core.c
+++ b/drivers/net/can/esd/esd_402_pci-core.c
@@ -447,6 +447,10 @@ static int pci402_init_cores(struct pci_dev *pdev)
priv->can.ctrlmode_supported |= CAN_CTRLMODE_FD |
CAN_CTRLMODE_TDC_AUTO |
CAN_CTRLMODE_TDC_MANUAL;
+ /* Mark that we always run with a common BRP. This mode is NOT
+ * changeable by the user.
+ */
+ priv->can.ctrlmode = CAN_CTRLMODE_FD_COMMON_BRP;
if (card->ov.version >= PCI402_FPGA_VER_0_72) {
priv->can.bittiming_const = &pci402fd_nom_bittiming_const;
--
2.34.1
