Hi Marc and everyone, as requested I split the series into two parts. This is the first parts with simple improvements to reduce the number of SPI transfers. The second part will be the rest with coalescing support and more complex optimizations. Changes in v2: - Fixed register ranges - Added fixes: tag for two patches Sorry that I am one day later than promised. Best, Markus Markus Schneider-Pargmann (11): can: m_can: Eliminate double read of TXFQS in tx_handler can: m_can: Avoid reading irqstatus twice can: m_can: Read register PSR only on error can: m_can: Count TXE FIFO getidx in the driver can: m_can: Count read getindex in the driver can: m_can: Batch acknowledge transmit events can: m_can: Batch acknowledge rx fifo can: tcan4x5x: Remove invalid write in clear_interrupts can: tcan4x5x: Fix use of register error status mask can: tcan4x5x: Fix register range of first two blocks can: tcan4x5x: Specify separate read/write ranges drivers/net/can/m_can/m_can.c | 90 +++++++++++++++---------- drivers/net/can/m_can/tcan4x5x-core.c | 19 ++---- drivers/net/can/m_can/tcan4x5x-regmap.c | 47 ++++++++++--- 3 files changed, 100 insertions(+), 56 deletions(-) base-commit: 76dcd734eca23168cb008912c0f69ff408905235 -- 2.38.1
