On 18.07.2022 11:55:18, Pavel Pisa wrote:
> The update is compatible/pure extension of 2.x IP core version
>
> - new option for 2, 4, or 8 Tx buffers option during synthesis.
> The 2.x version has fixed 4 Tx buffers. 3.x version default
> is 4 as well
> - new REG_TX_COMMAND_TXT_BUFFER_COUNT provides synthesis
> choice. When read as 0 assume 2.x core with fixed 4 Tx buffers.
> - new REG_ERR_CAPT_TS_BITS field to provide most significant
> active/implemented timestamp bit. For 2.x read as zero,
> assume value 63 is such case for 64 bit counter.
> - new REG_MODE_RXBAM bit which controls automatic advance
> to next word after Rx FIFO register read. Bit is set
> to 1 by default after the core reset (REG_MODE_RST)
> and value 1 has to be preserver for the normal ctucanfd
preserved?
> Linux driver operation. Even preceding driver version
> resets core and then modifies only known/required MODE
> register bits so backward and forward compatibility is
> ensured.
>
> See complete datasheet for time-triggered and other
> updated capabilities
>
> http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/Datasheet.pdf
>
> The fields related to ongoing Ondrej Ille's work
> on fault tolerant version with parity protected buffers
> and FIFOs are not included for now. Their inclusion will
> be considered when design is settled and tested.
>
> Signed-off-by: Pavel Pisa <pisa@xxxxxxxxxxxxxxxx>
regards,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
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