Extend dt-bindings for CTU CAN-FD IP core with necessary properties
to enable HW timestamping for platform devices. Since the timestamping
counter is provided by the system integrator usign those IP cores in
their FPGA design, we need to have the properties specified in device tree.
Signed-off-by: Matej Vasilevski <matej.vasilevski@xxxxxxxxx>
---
.../bindings/net/can/ctu,ctucanfd.yaml | 34 +++++++++++++++++--
1 file changed, 31 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml
index fb34d971dcb3..c3693dadbcd8 100644
--- a/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml
+++ b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml
@@ -41,9 +41,35 @@ properties:
clocks:
description: |
- phandle of reference clock (100 MHz is appropriate
- for FPGA implementation on Zynq-7000 system).
+ Phandle of reference clock (100 MHz is appropriate for FPGA
+ implementation on Zynq-7000 system). If you wish to use timestamps
+ from the core, add a second phandle with the clock used for timestamping
+ (can be the same as the first clock).
+ maxItems: 2
+
+ clock-names:
+ description: |
+ Specify clock names for the "clocks" property. The first clock name
+ doesn't matter, the second has to be "ts_clk". Timestamping frequency
+ is then obtained from the "ts_clk" clock. This takes precedence over
+ the ts-frequency property.
+ You can omit this property if you don't need timestamps.
+ maxItems: 2
+
+ ts-used-bits:
+ description: width of the timestamping counter
+ maxItems: 1
+ items:
+ minimum: 8
+ maximum: 64
+
+ ts-frequency:
+ description: |
+ Frequency of the timestamping counter. Set this if you want to get
+ timestamps, but you didn't set the timestamping clock in clocks property.
maxItems: 1
+ items:
+ minimum: 1
required:
- compatible
@@ -58,6 +84,8 @@ examples:
ctu_can_fd_0: can@43c30000 {
compatible = "ctu,ctucanfd";
interrupts = <0 30 4>;
- clocks = <&clkc 15>;
+ clocks = <&clkc 15>, <&clkc 15>;
+ clock-names = "can_clk", "ts_clk";
reg = <0x43c30000 0x10000>;
+ ts-used-bits = <64>;
};
--
2.25.1
