On 18.03.2022 06:12:30, Srinivas Neeli wrote:
> > Are you using the mainline xilinx_can driver? The "ip" command says, you're
> > using:
>
> Yes , mainline and internal drivers are same.
No, you are not. As explained in my last mail, there's no struct
can_bittiming_const in the mainline driver that matches your "ip"
output.
> Xilinx maintains common driver for multiple CAN and CANFD IP's.
> Xilinx supports below CAN IP's:
> xlnx,zynq-can-1.0 (zynq platform & zynqmp platform)
> xlnx,axi-can-1.00.a ( Soft IP version 1.00)
> xlnx,canfd-1.0 (Soft canfd ip version 1.0)
> xlnx,canfd-2.0(Soft canfd ip Version 2.0)
> xlnx,canfd2.0 equal to versal canfd ip, so using same compatible string for both.
>
> For each ip sjw_max and brp values are different.
> Due to this reason created multiple bit timing structures.
ACK. But your driver is obviously different to the mainline driver (see
above).
> > > sjw 1..128 brp 1..256
> > > dsjw 1..16 dbrp 1..256
> >
> > Looking at the mainline xilinx driver, we have:
> >
> > | /* CAN Bittiming constants as per Xilinx CAN specs */ static const
> > | struct can_bittiming_const xcan_bittiming_const = {
> > | .name = DRIVER_NAME,
> > | .tseg1_min = 1,
> > | .tseg1_max = 16,
> > | .tseg2_min = 1,
> > | .tseg2_max = 8,
> > | .sjw_max = 4,
> > ^
> > Does not match due to "sjw 1..128".
> >
> > | .brp_min = 1,
> > | .brp_max = 256,
> > | .brp_inc = 1,
> > | };
> > |
> > | /* AXI CANFD Arbitration Bittiming constants as per AXI CANFD 1.0 spec
> > | */ static const struct can_bittiming_const xcan_bittiming_const_canfd = {
> > | .name = DRIVER_NAME,
> > | .tseg1_min = 1,
> > | .tseg1_max = 64,
> > | .tseg2_min = 1,
> > | .tseg2_max = 16,
> > | .sjw_max = 16,
> > ^^
> > Does not match due to "sjw 1..128".
> >
> > | .brp_min = 1,
> > | .brp_max = 256,
> > | .brp_inc = 1,
> > | };
> > |
> > | /* AXI CANFD Data Bittiming constants as per AXI CANFD 1.0 specs */
> > | static struct can_bittiming_const xcan_data_bittiming_const_canfd = {
> > | .name = DRIVER_NAME,
> > | .tseg1_min = 1,
> > | .tseg1_max = 16,
> > | .tseg2_min = 1,
> > | .tseg2_max = 8,
> > | .sjw_max = 8,
> > ^
> > Does not match due to "dsjw 1..16"
> >
> > | .brp_min = 1,
> > | .brp_max = 256,
> > | .brp_inc = 1,
> > | };
> > |
> > | /* AXI CANFD 2.0 Arbitration Bittiming constants as per AXI CANFD 2.0
> > | spec */ static const struct can_bittiming_const
> > xcan_bittiming_const_canfd2 = {
> > | .name = DRIVER_NAME,
> > | .tseg1_min = 1,
> > | .tseg1_max = 256,
> > | .tseg2_min = 1,
> > | .tseg2_max = 128,
> > | .sjw_max = 128,
> > | .brp_min = 2,
> > ^
> > Does not match due to "brp 1..256".
> >
> > | .brp_max = 256,
> > | .brp_inc = 1,
> > | };
> > |
> > | /* AXI CANFD 2.0 Data Bittiming constants as per AXI CANFD 2.0 spec */
> > | static struct can_bittiming_const xcan_data_bittiming_const_canfd2 = {
> > | .name = DRIVER_NAME,
> > | .tseg1_min = 1,
> > | .tseg1_max = 32,
> > | .tseg2_min = 1,
> > | .tseg2_max = 16,
> > | .sjw_max = 16,
> > | .brp_min = 2,
> > ^
> > Does not match due to "dbrp 1..256".
>
> Versal early silicon we observed bit enlarging issue with brp =1 in
> side IP using simulaitons(Not observed on software side) , but it
> fixed in production silicon.
>
> Plan to revert this patch to support TDC feature(To support higher
> baud rates we need brp =1).
Ok.
regards,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
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Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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