Re: [PATCH V2 2/3] can: flexcan: enable RX FIFO after FRZ/HALT valid

[Marc Kleine-Budde <mkl@xxxxxxxxxxxxxx>]

On 03.02.2021 18:02:54, Joakim Zhang wrote:
> RX FIFO enable failed could happen when do system reboot stress test:
> 
> [    0.303958] flexcan 5a8d0000.can: 5a8d0000.can supply xceiver not found, using dummy regulator
> [    0.304281] flexcan 5a8d0000.can (unnamed net_device) (uninitialized): Could not enable RX FIFO, unsupported core
> [    0.314640] flexcan 5a8d0000.can: registering netdev failed
> [    0.320728] flexcan 5a8e0000.can: 5a8e0000.can supply xceiver not found, using dummy regulator
> [    0.320991] flexcan 5a8e0000.can (unnamed net_device) (uninitialized): Could not enable RX FIFO, unsupported core
> [    0.331360] flexcan 5a8e0000.can: registering netdev failed
> [    0.337444] flexcan 5a8f0000.can: 5a8f0000.can supply xceiver not found, using dummy regulator
> [    0.337716] flexcan 5a8f0000.can (unnamed net_device) (uninitialized): Could not enable RX FIFO, unsupported core
> [    0.348117] flexcan 5a8f0000.can: registering netdev failed
> 
> RX FIFO should be enabled after the FRZ/HALT are valid. But the current
> code enable RX FIFO and FRZ/HALT at the same time.
> 
> Fixes: e955cead03117 ("CAN: Add Flexcan CAN controller driver")
> Signed-off-by: Joakim Zhang <qiangqing.zhang@xxxxxxx>
> ---
>  drivers/net/can/flexcan.c | 11 +++++++----
>  1 file changed, 7 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
> index 737e594cb12c..84c98ea7dd55 100644
> --- a/drivers/net/can/flexcan.c
> +++ b/drivers/net/can/flexcan.c
> @@ -1825,10 +1825,13 @@ static int register_flexcandev(struct net_device *dev)
>  	if (err)
>  		goto out_chip_disable;
>  
> -	/* set freeze, halt and activate FIFO, restrict register access */
> -	reg = priv->read(&regs->mcr);
> -	reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT |
> -		FLEXCAN_MCR_FEN | FLEXCAN_MCR_SUPV;
> +	/* set freeze, halt */
> +	err = flexcan_chip_freeze(priv);
> +	if (err)
> +		goto out_chip_disable;
> +
> +	/* activate FIFO, restrict register access */
> +	reg |=  FLEXCAN_MCR_FEN | FLEXCAN_MCR_SUPV;
>  	priv->write(reg, &regs->mcr);

You are basically writing the contents of the CTRL register into the mcr
register, that's not good.

Marc

-- 
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