Reviewed-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xxxxxxxxxx>
> -----Original Message-----
> From: Srinivas Neeli <srinivas.neeli@xxxxxxxxxx>
> Sent: Tuesday, December 3, 2019 5:47 PM
> To: wg@xxxxxxxxxxxxxx; mkl@xxxxxxxxxxxxxx; davem@xxxxxxxxxxxxx; Michal Simek
> <michals@xxxxxxxxxx>; Appana Durga Kedareswara Rao <appanad@xxxxxxxxxx>
> Cc: linux-can@xxxxxxxxxxxxxxx; netdev@xxxxxxxxxxxxxxx; linux-arm-
> kernel@xxxxxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; git <git@xxxxxxxxxx>; Naga
> Sureshkumar Relli <nagasure@xxxxxxxxxx>; Srinivas Neeli <sneeli@xxxxxxxxxx>
> Subject: [PATCH V2] can: xilinx_can: Fix missing Rx can packets on CANFD2.0
>
> CANFD2.0 core uses BRAM for storing acceptance filter ID(AFID) and MASK
> (AFMASK)registers. So by default AFID and AFMASK registers contain random data. Due to
> random data, we are not able to receive all CAN ids.
>
> Initializing AFID and AFMASK registers with Zero before enabling acceptance filter to
> receive all packets irrespective of ID and Mask.
>
> Fixes: 0db9071353a0 ("can: xilinx: add can 2.0 support")
> Signed-off-by: Michal Simek <michal.simek@xxxxxxxxxx>
> Signed-off-by: Srinivas Neeli <srinivas.neeli@xxxxxxxxxx>
> ---
> drivers/net/can/xilinx_can.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c index
> 464af939cd8a..c1dbab8c896d 100644
> --- a/drivers/net/can/xilinx_can.c
> +++ b/drivers/net/can/xilinx_can.c
> @@ -60,6 +60,8 @@ enum xcan_reg {
> XCAN_TXMSG_BASE_OFFSET = 0x0100, /* TX Message Space */
> XCAN_RXMSG_BASE_OFFSET = 0x1100, /* RX Message Space */
> XCAN_RXMSG_2_BASE_OFFSET = 0x2100, /* RX Message Space */
> + XCAN_AFR_2_MASK_OFFSET = 0x0A00, /* Acceptance Filter MASK */
> + XCAN_AFR_2_ID_OFFSET = 0x0A04, /* Acceptance Filter ID */
> };
>
> #define XCAN_FRAME_ID_OFFSET(frame_base) ((frame_base) + 0x00)
> @@ -1809,6 +1811,11 @@ static int xcan_probe(struct platform_device *pdev)
>
> pm_runtime_put(&pdev->dev);
>
> + if (priv->devtype.flags & XCAN_FLAG_CANFD_2) {
> + priv->write_reg(priv, XCAN_AFR_2_ID_OFFSET, 0x00000000);
> + priv->write_reg(priv, XCAN_AFR_2_MASK_OFFSET, 0x00000000);
> + }
> +
> netdev_dbg(ndev, "reg_base=0x%p irq=%d clock=%d, tx buffers: actual %d, using
> %d\n",
> priv->reg_base, ndev->irq, priv->can.clock.freq,
> hw_tx_max, priv->tx_max);
> --
> 2.7.4
