On 11/11/19 7:39 PM, Drew Fustini wrote: >> I assume you get the 8MHz clock rate from the "ip" output, right? > I added printk to output the value of: > freq = clk_get_rate(clk); > > which is from line 1041: > https://elixir.bootlin.com/linux/latest/source/drivers/net/can/spi/mcp251x.c#L1041 > > which shows: > mcp251x_can_probe: clk_get_rate(clk)=8000000 Ok, then let's check if the device tree contains the correct value. Can you send the output of: dtc -I fs -O dts /proc/device-tree > I'm confused where that value is coming from. The line that divedes freq / 2 comes later. Me as well. > debian@beaglebone:~$ dmesg |grep -i mcp > [ 27.295958] mcp251x_can_probe: enter > [ 27.363720] mcp251x_can_probe: clk_get_rate(clk)=8000000 > [ 27.363731] mcp251x_can_probe: OVERRIDE freq=clk_get_rate(clk)=16000000 > [ 28.144501] mcp251x spi1.1 can2: MCP2515 successfully initialized. > [ 579.547200] mcp251x spi1.1 can2: bitrate error 0.1% > > Here is the diff where I hardcode 16MHz: > https://gist.github.com/pdp7/8e1765110178f4f65b04d19ac7cb1c4d#gistcomment-3079280 Looks good (as good as a HACK can look). But it proves your point. [...] > Thanks for the explanation. I'm still trying to figure out why clk_get_rate(clk) is returning 8MHz when I have 16MHz in the device tree. > > Would you be able to the DT overlay you are using? > > Maybe I am not using the correct properties to define the clock? > > This is the DT Overlay: > https://gist.github.com/pdp7/56174646bb9d075b041f24de2bb01973 It's the standard raspi mcp2515 overlay, I think it's this one: https://github.com/raspberrypi/linux/blob/rpi-4.19.y/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts Marc -- Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de | Vertretung West/Dortmund | Phone: +49-231-2826-924 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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