On 18.3.2019 13.32, Appana Durga Kedareswara rao wrote:
> AXI CAN IP and CANPS IP supports tx fifo empty feature, this patch updates
> the flags field for the same.
>
> Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xxxxxxxxxx>
> ---
> drivers/net/can/xilinx_can.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c
> index 2de51ac..22569ef 100644
> --- a/drivers/net/can/xilinx_can.c
> +++ b/drivers/net/can/xilinx_can.c
> @@ -1428,6 +1428,7 @@ static const struct dev_pm_ops xcan_dev_pm_ops = {
> };
>
> static const struct xcan_devtype_data xcan_zynq_data = {
> + .flags = XCAN_FLAG_TXFEMP,
> .bittiming_const = &xcan_bittiming_const,
> .btr_ts2_shift = XCAN_BTR_TS2_SHIFT,
> .btr_sjw_shift = XCAN_BTR_SJW_SHIFT,
Thanks for catching this, this line seemed to have been incorrectly
removed by my 9e5f1b273e ("can: xilinx_can: add support for Xilinx CAN
FD core").
But:
> @@ -1435,6 +1436,7 @@ static const struct xcan_devtype_data xcan_zynq_data = {
> };
>
> static const struct xcan_devtype_data xcan_axi_data = {
> + .flags = XCAN_FLAG_TXFEMP,
> .bittiming_const = &xcan_bittiming_const,
> .btr_ts2_shift = XCAN_BTR_TS2_SHIFT,
> .btr_sjw_shift = XCAN_BTR_SJW_SHIFT,
Are you sure this is right?
In the documentation [1] there does not seem to be any TXFEMP interrupt,
it would be interrupt bit 14 but AXI CAN 5.0 seems to only go up to 11.
Or maybe it is undocumented or there is a newer version somewhere?
[1]
https://www.xilinx.com/support/documentation/ip_documentation/can/v5_0/pg096-can.pdf
--
Anssi Hannula / Bitwise Oy
+358 503803997
