Yes, I have this working. I have a top level makefile that calls make on each subproject, and in each subproject makefile, first I define the variables specific to the project and then I include a common.mk. It took me some time to have it working to my taste, you will probably have to read the make manual thoroughly as I did. There is another option, which I never investigated, there are many other options for project compilation, like cmake or bjam. Darío On Mon, Jan 27, 2014 at 10:24 AM, Daniel Hilst Selli <danielhilst@xxxxxxxxx> wrote: > I was writing a set of makefiles to build some of my projects and I see me > copying/pasting some rules that are exactly the same, only changing the > directory where they are executed and the variables contents. > > Is there a way to write this kind of rules once and let it been inherited > from a make directory level to another... > > I think on something like this, > > Top Makefile > -- > generic-rule: > ... > -- > > subdir/Makefile > -- > inherit generic-rule > -- > > I think about writing this rules on a Common.mk makefile and -include this > file. Does anyone tried someting like that before? > -- > To unsubscribe from this list: send the line "unsubscribe > linux-c-programming" in > the body of a message to majordomo@xxxxxxxxxxxxxxx > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-c-programming" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
