Hello Vyacheslav, On Thu, Feb 23, 2023 at 3:14 PM Vyacheslav <adeep@xxxxxxxxx> wrote: [...] > > The bug report stimulated Martin’s maintainer memory over unfinished improvements > > to the Amlogic UART used in the g12a and newer SoC families (we are testing with > > g12b and sm1 devices) resulting in this series being submitted last night: > > > > https://patchwork.kernel.org/project/linux-amlogic/list/?series=724172 > > However, this does not fix the problem with rtl8822cs BT on gxl/axg chipsets My understanding is that Meson GXBB and newer can also use XTAL along with the UART controller's internal divider - without any additional pre-divider like "XTAL divided by 2" or "XTAL divided by 3". Using XTAL directly (24MHz) also makes it possible to achieve 1500000 baud without any jitter. The problem with the Meson UART driver however is that using XTAL directly is not implemented. Yu Tu from Amlogic worked on patches last year. v6 of his series made it into -next briefly, but got reverted due to issues. v7 then stalled: [0] and only the bare minimum (enabling "XTAL divided by 2") for the S4 SoC made it upstream in the end. My suggestion is: - let's get my small patchset upstreamed which at least fixes the 1500000 baud rate on G12A (and newer) SoCs - then work on resurrecting Yu Tu's patchset and implement "XTAL without any pre-dividers" support on top of that. Common Clock Framework will then choose the correct parent depending on the SoC generation, hopefully allowing arbitrary baud rates in the end - with no jitter/as little jitter as possible. What do you think? Best regards, Martin [0] https://lore.kernel.org/all/20220225073922.3947-1-yu.tu@xxxxxxxxxxx/
