Our SoC doesn't have the CPU caches coherent on DMA's. After getting the kernel updated to the 6.0-rcX version we've discovered a problem with the NVME hwmon probe. It turned out that the root cause of it was connected with the cache-line-unaligned buffer passed to the DMA-engine. Due to the cache-invalidation performed on the buffer mapping stage a part of the structure the buffer was embedded to was lost. Here we suggest to fix the problem just by aligning the buffer accordingly as the Documentation/core-api/dma-api.rst document requires. (See the corresponding patch log for more details.) A potential root of a similar problem has been detected in the sed-opal driver too. Even though we have not got any difficulties connected with that part we still suggest to fix that in the same way as it is done for the NVME hwmon driver. Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> Cc: Alexey Malahov <Alexey.Malahov@xxxxxxxxxxxxxxxxxxxx> Cc: Pavel Parkhomenko <Pavel.Parkhomenko@xxxxxxxxxxxxxxxxxxxx> Cc: Thomas Bogendoerfer <tsbogend@xxxxxxxxxxxxxxxx> Cc: linux-nvme@xxxxxxxxxxxxxxxxxxx Cc: linux-block@xxxxxxxxxxxxxxx Cc: linux-kernel@xxxxxxxxxxxxxxx Serge Semin (2): nvme-hwmon: Cache-line-align the NVME SMART log-buffer block: sed-opal: Cache-line-align the cmd/resp buffers block/sed-opal.c | 5 +++-- drivers/nvme/host/hwmon.c | 3 ++- 2 files changed, 5 insertions(+), 3 deletions(-) -- 2.37.2
