On Fri, 2019-03-08 at 12:19 -0700, Keith Busch wrote: +AD4 On Fri, Mar 08, 2019 at 10:42:17AM -0800, Bart Van Assche wrote: +AD4 +AD4 I think that the NVMe spec provides a more elegant mechanism, +AD4 +AD4 namely deleting the I/O submission queues. According to what I read in the +AD4 +AD4 1.3c spec deleting an I/O submission queue forces an NVMe controller to post a +AD4 +AD4 completion for every outstanding request. See also section 5.6 in the NVMe +AD4 +AD4 1.3c spec. +AD4 +AD4 That's actually not what it says. The controller may or may not post a +AD4 completion entry with a delete SQ command. The first behavior is defined +AD4 in the spec as +ACI-explicit+ACI and the second as +ACI-implicit+ACI. For implicit, +AD4 we have to iterate inflight tags. Hi Keith, Thanks for the clarification. Are you aware of any mechanism in the NVMe spec that causes all outstanding requests to fail? With RDMA this is easy - all one has to do is to change the queue pair state into IB+AF8-QPS+AF8-ERR. See also ib+AF8-drain+AF8-qp() in the RDMA core. If no such mechanism has been defined in the NVMe spec: have you considered to cancel all outstanding requests instead of calling blk+AF8-mq+AF8-end+AF8-request() for all outstanding requests? Thanks, Bart.
