On Thu 02 Dec 06:17 PST 2021, Dmitry Baryshkov wrote: > There are two different PCIe PHYs on SM8450, one having one lane and > another with two lanes. Add DT bindings for the first one. Support for > second PCIe host and PHY will be submitted separately. > Reviewed-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> > --- > Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml > index c59bbca9a900..d18075cb2b5d 100644 > --- a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml > @@ -50,6 +50,7 @@ properties: > - qcom,sm8350-qmp-ufs-phy > - qcom,sm8350-qmp-usb3-phy > - qcom,sm8350-qmp-usb3-uni-phy > + - qcom,sm8450-qmp-gen3x1-pcie-phy > - qcom,sm8450-qmp-ufs-phy > - qcom,sdx55-qmp-pcie-phy > - qcom,sdx55-qmp-usb3-uni-phy > @@ -333,6 +334,7 @@ allOf: > - qcom,sm8250-qmp-gen3x1-pcie-phy > - qcom,sm8250-qmp-gen3x2-pcie-phy > - qcom,sm8250-qmp-modem-pcie-phy > + - qcom,sm8450-qmp-gen3x1-pcie-phy > then: > properties: > clocks: > -- > 2.33.0 >
