On 01.12.2021 08:29, Vinod Koul wrote:
> From: Vladimir Zapolskiy <vladimir.zapolskiy@xxxxxxxxxx>
>
> The change adds a description of a SM8450 cpufreq-epss controller and
> references to it from CPU nodes.
>
> Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@xxxxxxxxxx>
> Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 27 +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
[...]
>
> + cluster1 {
> core4 {
> cpu = <&CPU4>;
> };
> @@ -182,7 +192,9 @@ core5 {
> core6 {
> cpu = <&CPU6>;
> };
> + };
>
> + cluster2 {
> core7 {
> cpu = <&CPU7>;
> };
Weren't DynamIQ-enabled SoCs supposed to be treated as single-cluster
from the Linux POV? Or has it changed again with the new chips?
[...]
Konrad
