On Fri 19 Nov 22:15 PST 2021, Vinod Koul wrote:
> The functions are documented but there were style issues, so fix
> the style and add missing description for phy_dwc3
>
> drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c:130:
> drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c:174:
> drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c:212: warning:
> This comment starts with '/**', but isn't a kernel-doc comment.
> Refer Documentation/doc-guide/kernel-doc.rst
>
Reviewed-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
> Reviewed-by: Randy Dunlap <rdunlap@xxxxxxxxxxxxx>
> Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx>
> ---
>
> Changes in v2: use () for function names
> update description of @phy_dwc3
>
> drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c | 26 +++++++++++----------
> 1 file changed, 14 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c b/drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c
> index bfff0c8c9130..fec1da470d26 100644
> --- a/drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c
> +++ b/drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c
> @@ -127,12 +127,13 @@ struct phy_drvdata {
> };
>
> /**
> - * Write register and read back masked value to confirm it is written
> + * usb_phy_write_readback() - Write register and read back masked value to
> + * confirm it is written
> *
> - * @base - QCOM DWC3 PHY base virtual address.
> - * @offset - register offset.
> - * @mask - register bitmask specifying what should be updated
> - * @val - value to write.
> + * @phy_dwc3: QCOM DWC3 phy context
> + * @offset: register offset.
> + * @mask: register bitmask specifying what should be updated
> + * @val: value to write.
> */
> static inline void usb_phy_write_readback(struct usb_phy *phy_dwc3,
> u32 offset,
> @@ -171,11 +172,11 @@ static int wait_for_latch(void __iomem *addr)
> }
>
> /**
> - * Write SSPHY register
> + * usb_ss_write_phycreg() - Write SSPHY register
> *
> - * @base - QCOM DWC3 PHY base virtual address.
> - * @addr - SSPHY address to write.
> - * @val - value to write.
> + * @phy_dwc3: QCOM DWC3 phy context
> + * @addr: SSPHY address to write.
> + * @val: value to write.
> */
> static int usb_ss_write_phycreg(struct usb_phy *phy_dwc3,
> u32 addr, u32 val)
> @@ -209,10 +210,11 @@ static int usb_ss_write_phycreg(struct usb_phy *phy_dwc3,
> }
>
> /**
> - * Read SSPHY register.
> + * usb_ss_read_phycreg() - Read SSPHY register.
> *
> - * @base - QCOM DWC3 PHY base virtual address.
> - * @addr - SSPHY address to read.
> + * @phy_dwc3: QCOM DWC3 phy context
> + * @addr: SSPHY address to read.
> + * @val: pointer in which read is store.
> */
> static int usb_ss_read_phycreg(struct usb_phy *phy_dwc3,
> u32 addr, u32 *val)
> --
> 2.31.1
>
