On Tue 16 Nov 05:01 CST 2021, Prasad Malisetty wrote:
> Replace pcie_1_pipe-clk clock name with pcie_1_pipe_clk
> To match with dt binding.
>
> Fixes: ab7772de8612 ("arm64: dts: qcom: SC7280: Add rpmhcc clock controller node")
>
> Signed-off-by: Prasad Malisetty <pmaliset@xxxxxxxxxxxxxx>
> Reported-by: kernel test robot <lkp@xxxxxxxxx>
This says "lkp reported an issue and this patch fixes that issue", but
looking back I think you picked up this tag because lkp had problems
building v1 of this patch.
I will drop it while applying the patch and I will remove the empty line
between Fixes and your S-o-b.
Regards,
Bjorn
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 365a2e0..cb94b87 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -576,7 +576,7 @@
> <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>,
> <0>, <0>, <0>, <0>, <0>, <0>;
> clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",
> - "pcie_0_pipe_clk", "pcie_1_pipe-clk",
> + "pcie_0_pipe_clk", "pcie_1_pipe_clk",
> "ufs_phy_rx_symbol_0_clk", "ufs_phy_rx_symbol_1_clk",
> "ufs_phy_tx_symbol_0_clk",
> "usb3_phy_wrapper_gcc_usb30_pipe_clk";
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
