Quoting Shawn Guo (2021-09-18 19:23:08)
> It looks that the offset 0x7d060 is a copy & paste from above
> hlos1_vote_turing_mmu_tbu1_gdsc. Correct it to 0x7d07c as per
> downstream kernel.
>
> Fixes: cbe63bfdc54f ("clk: qcom: Add Global Clock controller (GCC) driver for SM6115")
> Signed-off-by: Shawn Guo <shawn.guo@xxxxxxxxxx>
> ---
Applied to clk-fixes
