> @@ -610,6 +611,12 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)
> val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index);
> val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index);
>
> + if (ctrl->swrm_hctl_reg) {
> + val = ioread32(ctrl->swrm_hctl_reg);
> + val &= 0xFFFFFFFD;
magic value, use a #define MASK_SOMETHING?
> + iowrite32(val, ctrl->swrm_hctl_reg);
> + }
> +
> ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val);
>
> /* Enable Auto enumeration */
> @@ -1200,7 +1207,7 @@ static int qcom_swrm_probe(struct platform_device *pdev)
> struct qcom_swrm_ctrl *ctrl;
> const struct qcom_swrm_data *data;
> int ret;
> - u32 val;
> + int val, swrm_hctl_reg = 0;
>
> ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
> if (!ctrl)
> @@ -1251,6 +1258,9 @@ static int qcom_swrm_probe(struct platform_device *pdev)
> ctrl->bus.port_ops = &qcom_swrm_port_ops;
> ctrl->bus.compute_params = &qcom_swrm_compute_params;
>
> + if (!of_property_read_u32(dev->of_node, "qcom,swrm-hctl-reg", &swrm_hctl_reg))
> + ctrl->swrm_hctl_reg = devm_ioremap(&pdev->dev, swrm_hctl_reg, 0x4);
if (!ctrl->swrm_hctl_reg)
return -ENODEV;
?
> +
> ret = qcom_swrm_get_port_config(ctrl);
> if (ret)
> goto err_clk;
>
