On 20/09/2021 08:51, Greg KH wrote:
On Mon, Sep 20, 2021 at 01:04:34PM +0530, Jeya R wrote:
For latest chipsets, upto 13 fastrpc sessions can be
supported. This includes 12 compute sessions and 1 cpz
session. Not updating this might result to out of bounds
memory access issues if more than 9 context bank nodes
are added to the DT file.
Signed-off-by: Jeya R <jeyr@xxxxxxxxxxxxxx>
---
drivers/misc/fastrpc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/fastrpc.c b/drivers/misc/fastrpc.c
index beda610..bd7811e 100644
--- a/drivers/misc/fastrpc.c
+++ b/drivers/misc/fastrpc.c
@@ -24,7 +24,7 @@
#define SDSP_DOMAIN_ID (2)
#define CDSP_DOMAIN_ID (3)
#define FASTRPC_DEV_MAX 4 /* adsp, mdsp, slpi, cdsp*/
-#define FASTRPC_MAX_SESSIONS 9 /*8 compute, 1 cpz*/
+#define FASTRPC_MAX_SESSIONS 13 /*12 compute, 1 cpz*/
#define FASTRPC_ALIGN 128
#define FASTRPC_MAX_FDLIST 16
#define FASTRPC_MAX_CRCLIST 64
--
2.7.4
What happens if you run this on "older" chipsets?
This change should not have any implications on the older chips, as the
existing compute context bank device tree entries will not exceed 9.
And is this an issue now, or can this wait to 5.16-rc1?
We could wait take in 5.16-rc1, as its an enhancement to allow more
compute context banks.
--srini
thanks,
greg k-h
