On Thu 02 Sep 16:47 CDT 2021, Robert Marko wrote:
> IPQ8074 uses SMEM like other modern QCA SoC-s, so since its already
> supported by the kernel add the required DT nodes.
>
> Signed-off-by: Robert Marko <robimarko@xxxxxxxxx>
Thanks for your patch Robert.
> ---
> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 28 +++++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> index a620ac0d0b19..83e9243046aa 100644
> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> @@ -82,6 +82,29 @@ scm {
> };
> };
>
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + smem_region: memory@4ab00000 {
> + no-map;
> + reg = <0x0 0x4ab00000 0x0 0x00100000>;
> + };
> + };
> +
> + tcsr_mutex: hwlock {
> + compatible = "qcom,tcsr-mutex";
> + syscon = <&tcsr_mutex_regs 0 0x80>;
Since it's not okay to have a lone "syscon" and I didn't think it was
worth coming up with a binding for the TCSR mutex "syscon" I rewrote the
binding a while back. As such qcom,tcsr-mutex should now live in /soc
directly.
So can you please respin accordingly?
Thanks,
Bjorn
> + #hwlock-cells = <1>;
> + };
> +
> + smem {
> + compatible = "qcom,smem";
> + memory-region = <&smem_region>;
> + hwlocks = <&tcsr_mutex 0>;
> + };
> +
> soc: soc {
> #address-cells = <0x1>;
> #size-cells = <0x1>;
> @@ -293,6 +316,11 @@ gcc: gcc@1800000 {
> #reset-cells = <0x1>;
> };
>
> + tcsr_mutex_regs: syscon@1905000 {
> + compatible = "syscon";
> + reg = <0x01905000 0x8000>;
> + };
> +
> sdhc_1: sdhci@7824900 {
> compatible = "qcom,sdhci-msm-v4";
> reg = <0x7824900 0x500>, <0x7824000 0x800>;
> --
> 2.31.1
>
