On Mon 13 Sep 19:55 PDT 2021, Shawn Guo wrote:
> On QCM2290 platform, the clock xo_board runs at 38400000, while the
> child clock bi_tcxo needs to run at 19200000. That said,
> clk_smd_rpm_branch_ops needs the capability of setting rate. Add rate
> hooks into clk_smd_rpm_branch_ops to make it possible.
>
Most platforms has a crystal oscillator ticking at 38.4MHz feeding the
PMIC (represented by the rpmcc and its "xo" parent) and out comes the
bi_tcxo with a fixed 19.2MHz rate.
Is there a problem with the way sdm660_bi_tcxo is defined in this
regard?
Regards,
Bjorn
> Signed-off-by: Shawn Guo <shawn.guo@xxxxxxxxxx>
> ---
> drivers/clk/qcom/clk-smd-rpm.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index 66d7807ee38e..2380e45b6247 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -416,6 +416,9 @@ static const struct clk_ops clk_smd_rpm_ops = {
> static const struct clk_ops clk_smd_rpm_branch_ops = {
> .prepare = clk_smd_rpm_prepare,
> .unprepare = clk_smd_rpm_unprepare,
> + .set_rate = clk_smd_rpm_set_rate,
> + .round_rate = clk_smd_rpm_round_rate,
> + .recalc_rate = clk_smd_rpm_recalc_rate,
> };
>
> DEFINE_CLK_SMD_RPM(msm8916, pcnoc_clk, pcnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 0);
> --
> 2.17.1
>
