On 2021-08-10 18:03, Georgi Djakov wrote:
Hi Odelu,
On 10.08.21 9:46, Odelu Kukatla wrote:
Add Epoch Subsystem (EPSS) L3 interconnect provider node on SC7280
SoCs.
Signed-off-by: Odelu Kukatla <okukatla@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 53a21d0..e78f055 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -586,6 +586,15 @@
qcom,bcm-voters = <&apps_bcm_voter>;
};
+ epss_l3: interconnect@18590000 {
This DT node should be moved after apps_rsc: rsc@18200000
and before cpufreq@18591000
Thanks for review! will address this in next revision.
+ compatible = "qcom,sc7280-epss-l3";
+ reg = <0 0x18590000 0 1000>, <0 0x18591000 0 0x100>,
+ <0 0x18592000 0 0x100>, <0 0x18593000 0 0x100>;
Please align to the open parenthesis, to be consistent with the rest of
the file.
will address this in next revision.
+ clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
+ clock-names = "xo", "alternate";
+ #interconnect-cells = <1>;
+ };
+
ipa: ipa@1e40000 {
compatible = "qcom,sc7280-ipa";
Thanks,
Georgi
