There should only be two interconnects defined for IPA on the
QUalcomm SM8350 SoC. The names should also match those specified by
the IPA Device Tree binding.
Signed-off-by: Alex Elder <elder@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index a631d58166b1c..01f60a3bd1c14 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -666,12 +666,10 @@ ipa: ipa@1e40000 {
clocks = <&rpmhcc RPMH_IPA_CLK>;
clock-names = "core";
- interconnects = <&aggre2_noc MASTER_IPA &gem_noc SLAVE_LLCC>,
- <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>,
+ interconnects = <&aggre2_noc MASTER_IPA &mc_virt SLAVE_EBI1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_IPA_CFG>;
- interconnect-names = "ipa_to_llcc",
- "llcc_to_ebi1",
- "appss_to_ipa";
+ interconnect-names = "memory",
+ "config";
qcom,smem-states = <&ipa_smp2p_out 0>,
<&ipa_smp2p_out 1>;
--
2.27.0
