Quoting Bjorn Andersson (2021-07-21 20:07:38) > The USB/DP combo PHY exposes the "qmp_dp_phy_pll_link_clk" and > "qmp_dp_phy_pll_vco_div_clk" clocks, that are consumed by the display > clock controller. But for boards with multiple enabled QMP USB/DP combo > instances the hard coded names collides - and hence only the first > probed device is allowed to register. > > Given that clocks are no longer reference globally by name and it's > possible to replace the hard coded names by something unique, but still > user friendly. > > The two new clock names are based on dev_name() and results in names > such as "88ee000.phy::link_clk" and "88ee000.phy::vco_div_clk". > > Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx> > --- Reviewed-by: Stephen Boyd <swboyd@xxxxxxxxxxxx> Maybe we should make this a clk flag like CLK_NAME_PREFIX_DEVNAME so that clk_init_data::name is prefixed with dev_name() so the caller doesn't have to do the concatenation themselves.
