On Wed 16 Jun 08:01 CDT 2021, Martin Botka wrote: > > > On Tue, Jun 15 2021 at 07:29:49 PM -0500, Bjorn Andersson > <bjorn.andersson@xxxxxxxxxx> wrote: > > On Sun 13 Jun 03:05 CDT 2021, Martin Botka wrote: > > > > > This commits adds the Device tree file for SM6125 SoC. > > > > > > Signed-off-by: Martin Botka <martin.botka@xxxxxxxxxxxxxx> > > > > Thanks for your work on this Martin, just spotted a few minor finishing > > touches below. > > :) > > > > > > --- > > > Changes in V2: > > > Update compatibles for mailbox & pinctrl > > > Changes in V3: > > > Fix reg for sdhci1 > > > Replace hc_mem with hc and core_mem with core > > > arch/arm64/boot/dts/qcom/sm6125.dtsi | 603 > > > +++++++++++++++++++++++++++ > > > 1 file changed, 603 insertions(+) > > > create mode 100644 arch/arm64/boot/dts/qcom/sm6125.dtsi > > > > > > diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi > > > b/arch/arm64/boot/dts/qcom/sm6125.dtsi [..] > > > + sdc2_state_off: sdc2-off { > > > > This should be common between all boards (except possibly the cd line), > > so this is okay to share here. > > Do you want me to move the cd as well or > do you want it to stay in here? > While the pin assignment typically follows the reference design, in my view it's just any random GPIO and hence better suited to live in the board file. Regards, Bjorn