Quoting Kuogee Hsieh (2021-06-03 09:37:30) > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi > index 24d293e..40367a2 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi > @@ -786,6 +786,15 @@ hp_i2c: &i2c9 { > status = "okay"; > }; > > +&dp { This is in the wrong place now. Bjorn's suggestion for mdss_dp sounds good to me, and then putting the node in alphabetical order. > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&dp_hot_plug_det>; > + data-lanes = <0 1>; > + vdda-1p2-supply = <&vdda_usb_ss_dp_1p2>; > + vdda-0p9-supply = <&vdda_usb_ss_dp_core>; > +}; > + > &pm6150_adc { > charger-thermistor@4f { > reg = <ADC5_AMUX_THM3_100K_PU>; > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index 6228ba2..05a4133 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -3148,6 +3155,77 @@ > > status = "disabled"; > }; > + > + dp: displayport-controller@ae90000 { > + compatible = "qcom,sc7180-dp"; > + status = "disabled"; > + > + reg = <0 0x0ae90000 0 0x1400>; > + > + interrupt-parent = <&mdss>; > + interrupts = <12>; > + > + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, > + <&dispcc DISP_CC_MDSS_DP_AUX_CLK>, > + <&dispcc DISP_CC_MDSS_DP_LINK_CLK>, > + <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>, > + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>; > + clock-names = "core_iface", "core_aux", "ctrl_link", > + "ctrl_link_iface", "stream_pixel"; > + #clock-cells = <1>; > + assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>, > + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>; > + assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>; > + phys = <&dp_phy>; > + phy-names = "dp"; > + > + operating-points-v2 = <&opp_table>; > + power-domains = <&rpmhpd SC7180_CX>; I'm also curious about the power domain for DP. My guess is that both DSI and DP nodes should be a child of mdss if they're in the display subsystem and powered down/inaccessible when the mdss_gdsc is disabled. > + > + #sound-dai-cells = <0>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + port@0 { > + reg = <0>; > + dp_in: endpoint { > + remote-endpoint = <&dpu_intf0_out>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + dp_out: endpoint { }; > + }; > + }; > + > + opp_table: dp-opp-table { I meant dp_opp_table: opp-table { ... }; > + compatible = "operating-points-v2"; > + > + opp-160000000 { > + opp-hz = /bits/ 64 <160000000>; > + required-opps = <&rpmhpd_opp_low_svs>; > + }; > + > + opp-270000000 { > + opp-hz = /bits/ 64 <270000000>; > + required-opps = <&rpmhpd_opp_svs>;