Hi,
On Thu, 15 Apr 2021 at 13:39, Felipe Balbi <balbi@xxxxxxxxxx> wrote:
>
> From: Felipe Balbi <felipe.balbi@xxxxxxxxxxxxx>
>
> Add missing SPI nodes for SM8150.
>
> Signed-off-by: Felipe Balbi <felipe.balbi@xxxxxxxxxxxxx>
I'd suggest switching to gpio-cs as implemented for sc7180 and sm8250.
At least I'd propose to split the pinctrl into data+clock and CS
configurations, so that the CS implementation can be easily selected
on the board level.
> ---
>
> Tested on Microsoft Surface Duo (DTS will be sent after -rc1). This
> patch also depends on i2c nodes patch by Caleb Connolly
>
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 601 ++++++++++++++++++++++++++-
> 1 file changed, 599 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 7207a3689d9d..97007e1a6533 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -602,6 +602,21 @@ i2c0: i2c@880000 {
> status = "disabled";
> };
>
> + spi0: spi@880000 {
> + compatible = "qcom,spi-geni";
> + reg = <0 0x880000 0 0x4000>;
> + reg-names = "se";
> + clock-names = "se";
> + clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&qup_spi0_default>;
> + interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
> + spi-max-frequency = <50000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> i2c1: i2c@884000 {
> compatible = "qcom,geni-i2c";
> reg = <0 0x00884000 0 0x4000>;
[skipped
> @@ -1222,6 +1521,19 @@ config {
> };
> };
>
> + qup_spi0_default: qup-spi0-default {
> + mux {
> + pins = "gpio0", "gpio1", "gpio2", "gpio3";
> + function = "qup0";
> + };
> +
> + config {
> + pins = "gpio0", "gpio1", "gpio2", "gpio3";
> + drive-strength = <6>;
> + bias-disable;
> + };
> + };
> +
> qup_i2c1_default: qup-i2c1-default {
> mux {
> pins = "gpio114", "gpio115";
--
With best wishes
Dmitry
