On Fri, Apr 09, 2021 at 08:44:07AM -0500, Alex Elder wrote:
> The IPA core clock is required for SDX55. Define it.
>
> Signed-off-by: Alex Elder <elder@xxxxxxxxxx>
I tested this patch on couple of SDX55 based boards like Telit FN980 and
Thundercomm T55. Hence,
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
Also cross checked the IPA clock definition using QC internal docs, so
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
Thanks,
Mani
> ---
> drivers/clk/qcom/clk-rpmh.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
> index c623ce9004063..552d1cbfea4c0 100644
> --- a/drivers/clk/qcom/clk-rpmh.c
> +++ b/drivers/clk/qcom/clk-rpmh.c
> @@ -380,6 +380,7 @@ static const struct clk_rpmh_desc clk_rpmh_sdm845 = {
> DEFINE_CLK_RPMH_VRM(sdx55, rf_clk1, rf_clk1_ao, "rfclkd1", 1);
> DEFINE_CLK_RPMH_VRM(sdx55, rf_clk2, rf_clk2_ao, "rfclkd2", 1);
> DEFINE_CLK_RPMH_BCM(sdx55, qpic_clk, "QP0");
> +DEFINE_CLK_RPMH_BCM(sdx55, ipa, "IP0");
>
> static struct clk_hw *sdx55_rpmh_clocks[] = {
> [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw,
> @@ -389,6 +390,7 @@ static struct clk_hw *sdx55_rpmh_clocks[] = {
> [RPMH_RF_CLK2] = &sdx55_rf_clk2.hw,
> [RPMH_RF_CLK2_A] = &sdx55_rf_clk2_ao.hw,
> [RPMH_QPIC_CLK] = &sdx55_qpic_clk.hw,
> + [RPMH_IPA_CLK] = &sdx55_ipa.hw,
> };
>
> static const struct clk_rpmh_desc clk_rpmh_sdx55 = {
> --
> 2.27.0
>
