Re: [PATCH v3 11/16] clk: qcom: dispcc-sdm845: convert to parent data

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Hi Dmitry,

On 4/2/21 10:57 PM, Dmitry Baryshkov wrote:
Convert the clock driver to specify parent data rather than parent
names, to actually bind using 'clock-names' specified in the DTS rather
than global clock names.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
  drivers/clk/qcom/dispcc-sdm845.c | 188 ++++++++++++++++---------------
  1 file changed, 95 insertions(+), 93 deletions(-)

diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c
index 5c932cd17b14..bf5e8a4a0230 100644
--- a/drivers/clk/qcom/dispcc-sdm845.c
+++ b/drivers/clk/qcom/dispcc-sdm845.c
@@ -122,7 +124,7 @@ static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = {
  	.parent_map = disp_cc_parent_map_0,
  	.clkr.hw.init = &(struct clk_init_data){
  		.name = "disp_cc_mdss_byte0_clk_src",
-		.parent_names = disp_cc_parent_names_0,
+		.parent_data = disp_cc_parent_data_0,
  		.num_parents = 4,

While changing the surrounding lines, isn't it common practice to use ARRAY_SIZE(disp_cc_parent_data_0) here and below?

  		.flags = CLK_SET_RATE_PARENT,
  		.ops = &clk_byte2_ops,

@@ -381,8 +383,8 @@ static struct clk_branch disp_cc_mdss_byte0_clk = {
  		.enable_mask = BIT(0),
  		.hw.init = &(struct clk_init_data){
  			.name = "disp_cc_mdss_byte0_clk",
-			.parent_names = (const char *[]){
-				"disp_cc_mdss_byte0_clk_src",
+			.parent_data = &(const struct clk_parent_data){
+				.hw = &disp_cc_mdss_byte0_clk_src.clkr.hw,

For this commit and all other "convert to parent data" commits in this series: It should be possible to use .parent_hws which is a little more lightweight when only referencing parents that are internal to this clk controller. .parent_data is used to mix internal (.hw) parent clocks with external (.name and .fw_name) clocks.

  			},
  			.num_parents = 1,
  			.flags = CLK_SET_RATE_PARENT,

Thanks!
Marijn



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