Hi, On Wed, Mar 24, 2021 at 8:37 PM Veerabhadrarao Badiganti <vbadigan@xxxxxxxxxxxxxx> wrote: > > > On 3/24/2021 9:58 PM, Stephen Boyd wrote: > > Quoting Stephen Boyd (2021-03-24 08:57:33) > >> Quoting sbhanu@xxxxxxxxxxxxxx (2021-03-24 08:23:55) > >>> On 2021-03-23 12:31, Stephen Boyd wrote: > >>>> Quoting Shaik Sajida Bhanu (2021-03-20 11:17:00) > >>>>> + > >>>>> + bus-width = <8>; > >>>>> + non-removable; > >>>>> + supports-cqe; > >>>>> + no-sd; > >>>>> + no-sdio; > >>>>> + > >>>>> + max-frequency = <192000000>; > >>>> Is this necessary? > >>> yes, to avoid lower speed modes running with high clock rates. > >> Is it part of the DT binding? I don't see any mention of it. > > Nevermind, found it in mmc-controller.yaml. But I think this is to work > > around some problem with the clk driver picking lower speeds than > > requested? That has been fixed on the clk driver side (see commit like > > 148ddaa89d4a "clk: qcom: gcc-sc7180: Use floor ops for the correct sdcc1 > > clk") so ideally this property can be omitted. > This is a good have dt node. > > This will align clock requests between mmc core layer and sdhci-msm > platform driver. Say, for HS200/HS400 modes of eMMC, mmc-core layer > tries to set clock at 200Mhz, whereas sdhci-msm expects 192Mhz for > these modes. So we have to rely on clock driver floor/ceil values. > By having this property, mmc-core layer itself request for 192Mhz. > > Same is for SD card SDR104 mode, core layer expects clock at 208Mhz > whereas sdhci-msm can max operate only at 202Mhz. By having this > property, core layer requests only for 202Mhz for SDR104 mode. > > BTW, this helps only for max possible speed modes. > In case of lower-speed modes (for DDR52) we still need to rely on clock > floor rounding. Just let the clock driver figure it out and remove this from the devicetree, please. As you said, the clock driver needs to understand how to round rates anyway for the non-maximum requests. Putting the information here just duplicates the data. -Doug
