Re: [PATCH v2 05/14] arm64: dts: qcom: sc7280: Add RSC and PDC devices

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On 3/4/2021 5:34 AM, Stephen Boyd wrote:
Quoting Rajendra Nayak (2021-03-03 04:17:49)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 4a56d9c..21c2399 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -30,6 +31,18 @@
                 };
         };
+ reserved_memory: reserved-memory {

Do we plan to use this label at any point? I'd prefer we remove this
until it becomes useful.

sure, i'll drop it


+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               aop_cmd_db_mem: memory@80860000 {
+                       reg = <0x0 0x80860000 0x0 0x20000>;
+                       compatible = "qcom,cmd-db";
+                       no-map;
+               };
+       };
+
         cpus {
                 #address-cells = <2>;
                 #size-cells = <0>;
@@ -203,6 +229,7 @@
                         interrupt-controller;
                         #interrupt-cells = <2>;
                         gpio-ranges = <&tlmm 0 0 175>;
+                       wakeup-parent = <&pdc>;
qup_uart5_default: qup-uart5-default {
                                 pins = "gpio46", "gpio47";
@@ -287,6 +314,23 @@
                                 status = "disabled";
                         };
                 };
+
+               apps_rsc: rsc@18200000 {

Any better name than 'rsc'? Maybe 'power-controller'?

hmm, Maulik, any thoughts? This would perhaps need the bindings docs
to be updated as well (and maybe the existing platform DTs using rsc too)


+                       compatible = "qcom,rpmh-rsc";
+                       reg = <0 0x18200000 0 0x10000>,
+                             <0 0x18210000 0 0x10000>,
+                             <0 0x18220000 0 0x10000>;
+                       reg-names = "drv-0", "drv-1", "drv-2";
+                       interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+                       qcom,tcs-offset = <0xd00>;
+                       qcom,drv-id = <2>;
+                       qcom,tcs-config = <ACTIVE_TCS  2>,
+                                         <SLEEP_TCS   3>,
+                                         <WAKE_TCS    3>,
+                                         <CONTROL_TCS 1>;
+               };
         };

--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation



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