On IPAv3.1 there is no such FLAVOR_0 register so it is impossible
to read tx/rx channel masks and we have to rely on the correctness
on the provided configuration.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxxx>
---
drivers/net/ipa/ipa_endpoint.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/net/ipa/ipa_endpoint.c b/drivers/net/ipa/ipa_endpoint.c
index 06d8aa34276e..10c477e1bb90 100644
--- a/drivers/net/ipa/ipa_endpoint.c
+++ b/drivers/net/ipa/ipa_endpoint.c
@@ -1659,6 +1659,15 @@ int ipa_endpoint_config(struct ipa *ipa)
u32 max;
u32 val;
+ /* Some IPA versions don't provide a FLAVOR register and we cannot
+ * check the rx/tx masks hence we have to rely on the correctness
+ * of the provided configuration.
+ */
+ if (ipa->version == IPA_VERSION_3_1) {
+ ipa->available = U32_MAX;
+ return 0;
+ }
+
/* Find out about the endpoints supplied by the hardware, and ensure
* the highest one doesn't exceed the number we support.
*/
--
2.30.0
