On 2021-02-05 11:02, Stephen Boyd wrote:
Quoting Krishna Manikandan (2021-02-03 22:42:19)
Add bindings for Snapdragon DisplayPort controller driver.
Signed-off-by: Chandan Uddaraju <chandanu@xxxxxxxxxxxxxx>
Signed-off-by: Vara Reddy <varar@xxxxxxxxxxxxxx>
Signed-off-by: Tanmay Shah <tanmay@xxxxxxxxxxxxxx>
Signed-off-by: Kuogee Hsieh <khsieh@xxxxxxxxxxxxxx>
[...]
Changes in v11:
- add ports required of both #address-cells and #size-cells
- add required operating-points-v2
- add required #sound-dai-cells
- add required power-domains
- update maintainer list
Where's that maintainer file update?
I had deleted Tanmay.
Anyway, I will removed Chandan at next upload.
---
.../bindings/display/msm/dp-controller.yaml | 157
+++++++++++++++++++++
.../bindings/display/msm/dpu-sc7180.yaml | 10 ++
2 files changed, 167 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/msm/dp-controller.yaml
diff --git
a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
new file mode 100644
index 0000000..2b71c7a
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -0,0 +1,157 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MSM Display Port Controller
+
+maintainers:
+ - Chandan Uddaraju <chandanu@xxxxxxxxxxxxxx>
This email is bouncing. Please remove Chandan.
ok
+ - Vara Reddy <varar@xxxxxxxxxxxxxx>
+ - Kuogee Hsieh <khsieh@xxxxxxxxxxxxxx>
+
+description: |
+ Device tree bindings for DisplayPort host controller for MSM
targets
+ that are compatible with VESA DisplayPort interface specification.
+
+properties:
+ compatible:
+ enum:
+ - qcom,sc7180-dp
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: AHB clock to enable register access
+ - description: Display Port AUX clock
+ - description: Display Port Link clock
+ - description: Link interface clock between DP and PHY
+ - description: Display Port Pixel clock
+
+ clock-names:
+ items:
+ - const: core_iface
+ - const: core_aux
+ - const: ctrl_link
+ - const: ctrl_link_iface
+ - const: stream_pixel
+
+ phys:
+ maxItems: 1
+
+ phy-names:
+ items:
+ - const: dp
+
+ operating-points-v2:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ "#sound-dai-cells":
+ const: 0
+
+ ports:
+ type: object
+ description: |
+ A ports node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt.
+ properties:
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ port@0:
+ type: object
+ description: Input endpoint of the controller
+
+ port@1:
+ type: object
+ description: Output endpoint of the controller
+
+ required:
+ - "#address-cells"
+ - "#size-cells"
+
+ additionalProperties: false
+
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - phys
+ - phy-names
+ - "#sound-dai-cells"
+ - power-domains
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
+ #include <dt-bindings/power/qcom-aoss-qmp.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ mdss@ae00000 {
mdss is not a standard node name. Maybe 'subsystem'?
Can you give me more details regrading this.
I had double checked both ti/ti,am65x-dss.yaml and msm/dsi-phy.yaml and
can not find any clue for this.
Can I just followed msm/dsi-phy.yaml for this?
+ #address-cells = <2>;
+ #size-cells = <2>;
+ reg = <0xae00000 0x1000>, /* mdss */
+ <0xae90000 0x1400>; /* dp */
This second reg property shouldn't be here.
ok
+ reg-names = "mdss", "dp";
+
+ displayport-controller@ae90000 {
