On Mon 07 Sep 05:19 CDT 2020, Robert Marko wrote:
> Since we now have driver for the SDHCI VQMMC LDO needed
> for I/0 voltage levels lets introduce the necessary node for it.
>
> Signed-off-by: Robert Marko <robert.marko@xxxxxxxxxx>
> Cc: Luka Perkov <luka.perkov@xxxxxxxxxx>
> ---
> arch/arm/boot/dts/qcom-ipq4019.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> index 6741a1972e55..7774dbd3cec7 100644
> --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> @@ -211,6 +211,16 @@ tlmm: pinctrl@1000000 {
> interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> + vqmmc: regulator@1948000 {
> + compatible = "qcom,vqmmc-ipq4019-regulator";
> + reg = <0x01948000 0x4>;
The actual hardware block where this register is found is the "TCSR"
which is 0x01947000 of size 0x21000 - making this the register at offset
0x11000.
Perhaps it would have been better represented as a simple-mfd with this
regulator as a child node thereof.
That said, this has been sitting long enough, so I'll merge it as is and
we can rework it once we need more pieces of tcsr.
Thanks,
Bjorn
> + regulator-name = "vqmmc";
> + regulator-min-microvolt = <1500000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-always-on;
> + status = "disabled";
> + };
> +
> sdhci: sdhci@7824900 {
> compatible = "qcom,sdhci-msm-v4";
> reg = <0x7824900 0x11c>, <0x7824000 0x800>;
> --
> 2.26.2
>
