Quoting Konrad Dybcio (2020-12-26 06:09:34)
> On boards without cont_splash the clock wouldn't get enabled.
> Reparent it and strongly depend on the parent to make sure
> it's accessible. Access to MMSS depends on mmss_s0_axi being
It's not a dependency. The parent is supposed to be the actual parent
clk that is directly upstream of the clk. I understand that some
dependency isn't enabled but maybe that just means we need to write some
enable bit when this driver probes instead?
> up and alive.
>
> Fixes: d8b212014e69 ("clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxx>
> ---
> drivers/clk/qcom/mmcc-msm8974.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/qcom/mmcc-msm8974.c b/drivers/clk/qcom/mmcc-msm8974.c
> index 015426262d08..6220b62ece1e 100644
> --- a/drivers/clk/qcom/mmcc-msm8974.c
> +++ b/drivers/clk/qcom/mmcc-msm8974.c
> @@ -2101,11 +2101,11 @@ static struct clk_branch mmss_s0_axi_clk = {
> .hw.init = &(struct clk_init_data){
> .name = "mmss_s0_axi_clk",
> .parent_names = (const char *[]){
> - "mmss_axi_clk_src",
> + "mmss_mmssnoc_axi_clk",
> },
> .num_parents = 1,
> .ops = &clk_branch2_ops,
> - .flags = CLK_IGNORE_UNUSED,
> + .flags = CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
> },
> },
