On 12/11/2020 12:40 PM, Stephen Boyd wrote:
Quoting Vinod Koul (2020-12-10 21:43:49)
On 10-12-20, 12:43, Stephen Boyd wrote:
+static struct clk_branch gcc_camera_ahb_clk = {
+ .halt_reg = 0x26004,
+ .halt_check = BRANCH_HALT_DELAY,
+ .hwcg_reg = 0x26004,
+ .hwcg_bit = 1,
+ .clkr = {
+ .enable_reg = 0x26004,
+ .enable_mask = BIT(0),
+ .hw.init = &(struct clk_init_data){
+ .name = "gcc_camera_ahb_clk",
+ .flags = CLK_IS_CRITICAL,
Why is it critical? Can we just enable it in driver probe and stop
modeling it as a clk?
it does not have a parent we control, yeah it would make sense to do
that. Tanya do you folks agree ..?
Maybe it is needed for camera clk controller? Have to check other SoCs
and see if they're using it.
Yes, they would have to be left enabled.
Vinod, could you please move them to probe, similar to kona/sc7180 where
all the CRITICALs clocks are left enabled?
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