On Wed, Dec 02, 2020 at 06:05:14PM -0800, Eric Biggers wrote: > From: Eric Biggers <ebiggers@xxxxxxxxxx> > > Document the bindings for the registers and clock for the MMC instance > of the Inline Crypto Engine (ICE) on Snapdragon SoCs. These bindings > are needed in order for sdhci-msm to support inline encryption. > > Signed-off-by: Eric Biggers <ebiggers@xxxxxxxxxx> > --- > Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > index 3b602fd6180bf..4f2e138439506 100644 > --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > @@ -30,10 +30,12 @@ Required properties: > - SD Core register map (required for controllers earlier than msm-v5) > - CQE register map (Optional, CQE support is present on SDHC instance meant > for eMMC and version v4.2 and above) > + - Inline Crypto Engine register map (optional) > - reg-names: When CQE register map is supplied, below reg-names are required > - "hc" for Host controller register map > - "core" for SD core register map > - "cqhci" for CQE register map > + - "ice" for Inline Crypto Engine register map (optional) > - interrupts: Should contain an interrupt-specifiers for the interrupts: > - Host controller interrupt (required) > - pinctrl-names: Should contain only one value - "default". > @@ -46,6 +48,7 @@ Required properties: > "xo" - TCXO clock (optional) > "cal" - reference clock for RCLK delay calibration (optional) > "sleep" - sleep clock for RCLK delay calibration (optional) > + "ice" - clock for Inline Crypto Engine (optional) > > - qcom,ddr-config: Certain chipsets and platforms require particular settings > for the DDR_CONFIG register. Use this field to specify the register > -- > 2.29.2 > Looks good to me. Please feel free to add Reviewed-by: Satya Tangirala <satyat@xxxxxxxxxx>
