Hi guys, On Thursday 17 Sep 2020 at 23:39:10 (+0300), Dmitry Baryshkov wrote: > Enable CONFIG_INTERCONNECT and interconnect drivers for several Qualcomm > chipsets to enable bus bandwidth control on these SoCs. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> > --- > arch/arm64/configs/defconfig | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig > index 63003ec116ee..2e746ebb9245 100644 > --- a/arch/arm64/configs/defconfig > +++ b/arch/arm64/configs/defconfig > @@ -1023,6 +1023,12 @@ CONFIG_SLIMBUS=m > CONFIG_SLIM_QCOM_CTRL=m > CONFIG_SLIM_QCOM_NGD_CTRL=m > CONFIG_MUX_MMIO=y > +CONFIG_INTERCONNECT=y > +CONFIG_INTERCONNECT_QCOM=y > +CONFIG_INTERCONNECT_QCOM_MSM8916=m > +CONFIG_INTERCONNECT_QCOM_SDM845=m > +CONFIG_INTERCONNECT_QCOM_SM8150=m > +CONFIG_INTERCONNECT_QCOM_SM8250=m This needs an additional +CONFIG_INTERCONNECT_QCOM_OSM_L3=m or +CONFIG_INTERCONNECT_QCOM_OSM_L3=y Without it cpufreq fails to initialize on DB845c. When CONFIG_INTERCONNECT_QCOM_OSM_L3=n (which is what it will default to when doing ARCH=arm64 make defcofnig), the osm_l3 is not registered as a provider and therefore will not be found when doing: qcom_cpufreq_hw_driver_probe() -> dev_pm_opp_of_find_icc_paths() -> of_icc_get_by_index(). This being said, it also does not feel right for cpufreq enablement to depend on L3 scaling enablement, so better error filtering might be needed in the drivers instead. But I'll leave that decision to you, while the above is only a quick fix. The issue is reproduced with linux next 20201104, after applying the iommu patches at [1]. Hope it helps, Ionela. [1] https://lore.kernel.org/lkml/160399513141.1314250.8831514745970142969.b4-ty@xxxxxxxxxx/ > CONFIG_EXT2_FS=y > CONFIG_EXT3_FS=y > CONFIG_EXT4_FS_POSIX_ACL=y > -- > 2.28.0 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@xxxxxxxxxxxxxxxxxxx > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
