Re: [PATCH v2 2/2] pinctrl: qcom: Add SDX55 pincontrol driver

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On Mon 02 Nov 23:58 CST 2020, Vinod Koul wrote:

> From: Jeevan Shriram <jshriram@xxxxxxxxxxxxxx>
> 
> Add initial Qualcomm SDX55 pinctrl driver to support pin configuration
> with pinctrl framewor for SDX55 SoC.
> 
> Signed-off-by: Jeevan Shriram <jshriram@xxxxxxxxxxxxxx>
> [ported from downstream and tidy up]
> Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx>
> ---

No changes since v1? ;)

>  drivers/pinctrl/qcom/Kconfig         |    9 +
>  drivers/pinctrl/qcom/Makefile        |    1 +
>  drivers/pinctrl/qcom/pinctrl-sdx55.c | 1018 ++++++++++++++++++++++++++
>  3 files changed, 1028 insertions(+)
>  create mode 100644 drivers/pinctrl/qcom/pinctrl-sdx55.c
[..]
> diff --git a/drivers/pinctrl/qcom/pinctrl-sdx55.c b/drivers/pinctrl/qcom/pinctrl-sdx55.c
[..]
> +static const struct msm_pingroup sdx55_groups[] = {
> +	[0] = PINGROUP(0, uim2_data, blsp_uart1, qdss_stm, ebi0_wrcdc, _, _, _, _, _),
> +	[1] = PINGROUP(1, uim2_present, blsp_uart1, qdss_stm, _, _, _, _, _, _),
> +	[2] = PINGROUP(2, uim2_reset, blsp_uart1, blsp_i2c1, qdss_stm, ebi0_wrcdc, _, _, _, _),
> +	[3] = PINGROUP(3, uim2_clk, blsp_uart1, blsp_i2c1, qdss_stm, _, _, _, _, _),
> +	[4] = PINGROUP(4, blsp_spi2, blsp_uart2, _, qdss_stm, qdss_gpio, _, _, _, _),
> +	[5] = PINGROUP(5, blsp_spi2, blsp_uart2, _, qdss_stm, qdss_gpio, _, _, _, _),
> +	[6] = PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, char_exec, _, qdss_stm, qdss_gpio, _, _),
> +	[7] = PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, char_exec, _, qdss_stm, qdss_gpio, _, _),
> +	[8] = PINGROUP(8, pri_mi2s, blsp_spi3, blsp_uart3, ext_dbg, ldo_en, _, _, _, _),
> +	[9] = PINGROUP(9, pri_mi2s, blsp_spi3, blsp_uart3, ext_dbg, _, _, _, _, _),
> +	[10] = PINGROUP(10, pri_mi2s, blsp_spi3, blsp_uart3, blsp_i2c3, ext_dbg, _, _, _, _),
> +	[11] = PINGROUP(11, pri_mi2s, blsp_spi3, blsp_uart3, blsp_i2c3, ext_dbg, gcc_gp3, _, _, _),
> +	[12] = PINGROUP(12, pri_mi2s, _, qdss_stm, qdss_gpio, _, _, _, _, _),
> +	[13] = PINGROUP(13, pri_mi2s, _, qdss_stm, qdss_gpio, _, _, _, _, _),
> +	[14] = PINGROUP(14, pri_mi2s, emac_gcc1, _, _, qdss_stm, qdss_gpio, bimc_dte0, native_tsens, vsense_trigger),
> +	[15] = PINGROUP(15, pri_mi2s, emac_gcc0, _, _, qdss_stm, qdss_gpio, bimc_dte1, _, _),
> +	[16] = PINGROUP(16, sec_mi2s, blsp_spi4, blsp_uart4, qdss_cti, qdss_cti, _, _, qdss_stm, qdss_gpio),
> +	[17] = PINGROUP(17, sec_mi2s, blsp_spi4, blsp_uart4, qdss_cti, qdss_cti, _, qdss_stm, qdss_gpio, _),
> +	[18] = PINGROUP(18, sec_mi2s, blsp_spi4, blsp_uart4, blsp_i2c4, gcc_gp1, qdss_stm, qdss_gpio, _, _),
> +	[19] = PINGROUP(19, sec_mi2s, blsp_spi4, blsp_uart4, blsp_i2c4, jitter_bist, gcc_gp2, _, qdss_stm, qdss_gpio),
> +	[20] = PINGROUP(20, sec_mi2s, ebi2_a, blsp_uart1, blsp_uart4, qdss_stm, _, _, _, _),
> +	[21] = PINGROUP(21, sec_mi2s, ebi2_lcd, blsp_uart1, blsp_uart4, _, qdss_stm, _, _, _),
> +	[22] = PINGROUP(22, sec_mi2s, ebi2_lcd, blsp_uart1, qdss_cti, qdss_cti, blsp_uart4, pll_bist, _, qdss_stm),
> +	[23] = PINGROUP(23, sec_mi2s, ebi2_lcd, qdss_cti, qdss_cti, blsp_uart1, blsp_uart4, qdss_stm, _, _),
> +	[24] = PINGROUP(24, adsp_ext, _, _, _, _, _, _, _, _),
> +	[25] = PINGROUP(25, adsp_ext, _, _, _, _, _, _, _, _),
> +	[26] = PINGROUP(26, _, _, _, native_char, _, _, _, _, _),
> +	[27] = PINGROUP(27, _, _, _, _, _, _, _, _, _),
> +	[28] = PINGROUP(28, qlink0_wmss, _, native_char3, _, _, _, _, _, _),
> +	[29] = PINGROUP(29, _, _, _, native_char2, native_tsense, _, _, _, _),
> +	[30] = PINGROUP(30, _, _, _, _, _, _, _, _, _),
> +	[31] = PINGROUP(31, nav_gpio, _, _, _, _, _, _, _, _),
> +	[32] = PINGROUP(32, nav_gpio, pll_ref, _, _, _, _, _, _, _),
> +	[33] = PINGROUP(33, _, pa_indicator, native_char0, _, _, _, _, _, _),
> +	[34] = PINGROUP(34, qlink0_en, _, _, _, _, _, _, _, _),
> +	[35] = PINGROUP(35, qlink0_req, pll_test, _, _, _, _, _, _, _),
> +	[36] = PINGROUP(36, _, _, cri_trng, dbg_out, _, _, _, _, _),
> +	[37] = PINGROUP(37, _, _, _, _, _, _, _, _, _),
> +	[38] = PINGROUP(38, _, _, prng_rosc, _, _, _, _, _, _),
> +	[39] = PINGROUP(39, _, _, _, _, _, _, _, _, _),
> +	[40] = PINGROUP(40, _, _, cri_trng0, _, _, _, _, _, _),
> +	[41] = PINGROUP(41, _, _, cri_trng1, _, _, _, _, _, _),
> +	[42] = PINGROUP(42, _, qdss_gpio, native_char1, _, _, _, _, _, _),
> +	[43] = PINGROUP(43, _, _, _, _, _, _, _, _, _),
> +	[44] = PINGROUP(44, coex_uart, spmi_coex, _, qdss_stm, _, _, _, _, _),
> +	[45] = PINGROUP(45, coex_uart, spmi_coex, qdss_stm, ddr_pxi0, _, _, _, _, _),
> +	[46] = PINGROUP(46, m_voc, ddr_bist, ddr_pxi0, _, _, _, _, _, _),
> +	[47] = PINGROUP(47, ddr_bist, _, _, _, _, _, _, _, _),
> +	[48] = PINGROUP(48, m_voc, ddr_bist, _, _, _, _, _, _, _),
> +	[49] = PINGROUP(49, m_voc, ddr_bist, _, _, _, _, _, _, _),
> +	[50] = PINGROUP(50, _, _, _, _, _, _, _, _, _),
> +	[51] = PINGROUP(51, _, _, _, _, _, _, _, _, _),
> +	[52] = PINGROUP(52, blsp_spi2, blsp_spi1, blsp_spi3, blsp_spi4, _, _, qdss_stm, _, _),
> +	[53] = PINGROUP(53, pci_e, _, _, qdss_stm, _, _, _, _, _),
> +	[54] = PINGROUP(54, qdss_cti, qdss_cti, _, _, _, _, _, _, _),
> +	[55] = PINGROUP(55, qdss_cti, qdss_cti, tgu_ch0, _, _, _, _, _, _),
> +	[56] = PINGROUP(56, pcie_clkreq, _, qdss_stm, _, _, _, _, _, _),
> +	[57] = PINGROUP(57, _, qdss_stm, _, _, _, _, _, _, _),
> +	[58] = PINGROUP(58, _, _, _, _, _, _, _, _, _),
> +	[59] = PINGROUP(59, qdss_cti, m_voc, bimc_dte0, _, _, _, _, _, _),
> +	[60] = PINGROUP(60, qdss_cti, _, m_voc, _, _, _, _, _, _),
> +	[61] = PINGROUP(61, mgpi_clk, qdss_stm, qdss_gpio, bimc_dte1, _, _, _, _, _),
> +	[62] = PINGROUP(62, i2s_mclk, audio_ref, blsp_spi1, blsp_spi2, blsp_spi3, blsp_spi4, ldo_update, qdss_stm, _),
> +	[63] = PINGROUP(63, blsp_uart2, _, qdss_stm, qdss_gpio, atest, _, _, _, _),
> +	[64] = PINGROUP(64, blsp_uart2, qdss_stm, qdss_gpio, atest, _, _, _, _, _),
> +	[65] = PINGROUP(65, blsp_uart2, blsp_i2c2, _, qdss_stm, qdss_gpio, atest, _, _, _),
> +	[66] = PINGROUP(66, blsp_uart2, blsp_i2c2, qdss_stm, qdss_gpio, atest, _, _, _, _),
> +	[67] = PINGROUP(67, uim1_data, atest, _, _, _, _, _, _, _),
> +	[68] = PINGROUP(68, uim1_present, _, _, _, _, _, _, _, _),
> +	[69] = PINGROUP(69, uim1_reset, _, _, _, _, _, _, _, _),
> +	[70] = PINGROUP(70, uim1_clk, _, _, _, _, _, _, _, _),
> +	[71] = PINGROUP(71, mgpi_clk, blsp_spi1, blsp_spi2, blsp_spi3, blsp_spi4, _, _, _, _),
> +	[72] = PINGROUP(72, qlink1_en, _, _, _, _, _, _, _, _),
> +	[73] = PINGROUP(73, qlink1_req, _, _, _, _, _, _, _, _),
> +	[74] = PINGROUP(74, qlink1_wmss, _, _, _, _, _, _, _, _),
> +	[75] = PINGROUP(75, coex_uart2, _, _, _, _, _, _, _, _),
> +	[76] = PINGROUP(76, coex_uart2, nav_gpio, _, _, _, _, _, _, _),
> +	[77] = PINGROUP(77, _, _, _, _, _, _, _, _, _),
> +	[78] = PINGROUP(78, spmi_vgi, blsp_i2c4, _, _, _, _, _, _, _),
> +	[79] = PINGROUP(79, spmi_vgi, blsp_i2c4, _, _, _, _, _, _, _),
> +	[80] = PINGROUP(80, _, blsp_spi1, _, _, _, _, _, _, _),
> +	[81] = PINGROUP(81, _, blsp_spi1, _, gcc_plltest, _, _, _, _, _),
> +	[82] = PINGROUP(82, _, blsp_spi1, _, blsp_i2c1, gcc_plltest, _, _, _, _),
> +	[83] = PINGROUP(83, _, blsp_spi1, _, blsp_i2c1, _, _, _, _, _),
> +	[84] = PINGROUP(84, _, _, _, _, _, _, _, _, _),
> +	[85] = PINGROUP(85, _, _, _, _, _, _, _, _, _),
> +	[86] = PINGROUP(86, _, _, _, _, _, _, _, _, _),
> +	[87] = PINGROUP(87, _, _, _, _, _, _, _, _, _),
> +	[88] = PINGROUP(88, _, _, _, _, _, _, _, _, _),
> +	[89] = PINGROUP(89, _, _, _, _, _, _, _, _, _),
> +	[90] = PINGROUP(90, _, _, _, _, _, _, _, _, _),
> +	[91] = PINGROUP(91, _, _, _, _, _, _, _, _, _),
> +	[92] = PINGROUP(92, _, _, _, _, _, _, _, _, _),
> +	[93] = PINGROUP(93, _, _, usb2phy_ac, _, _, _, _, _, _),
> +	[94] = PINGROUP(94, qdss_cti, qdss_cti, _, _, _, _, _, _, _),
> +	[95] = PINGROUP(95, qdss_cti, qdss_cti, emac_pps1, _, _, _, _, _, _),
> +	[96] = PINGROUP(96, _, _, _, _, _, _, _, _, _),
> +	[97] = PINGROUP(97, _, _, _, _, _, _, _, _, _),
> +	[98] = PINGROUP(98, _, _, _, _, _, _, _, _, _),
> +	[99] = PINGROUP(99, _, _, _, _, _, _, _, _, _),
> +	[100] = PINGROUP(100, _, _, _, _, _, _, _, _, _),
> +	[101] = PINGROUP(101, _, _, _, _, _, _, _, _, _),
> +	[102] = PINGROUP(102, _, _, _, _, _, _, _, _, _),
> +	[103] = PINGROUP(103, _, _, _, _, _, _, _, _, _),
> +	[104] = PINGROUP(104, _, _, _, _, _, _, _, _, _),
> +	[105] = PINGROUP(105, _, _, _, _, _, _, _, _, _),
> +	[106] = PINGROUP(106, emac_pps0, _, _, _, _, _, _, _, _),
> +	[107] = PINGROUP(107, _, _, _, _, _, _, _, _, _),
> +	[109] = SDC_PINGROUP(sdc1_rclk, 0x9a000, 15, 0),
> +	[110] = SDC_PINGROUP(sdc1_clk, 0x9a000, 13, 6),
> +	[111] = SDC_PINGROUP(sdc1_cmd, 0x9a000, 11, 3),
> +	[112] = SDC_PINGROUP(sdc1_data, 0x9a000, 9, 0),
> +};

Looks better, and ngpios is good.

Reviewed-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>

Thanks,
Bjorn



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