Hello, Md Sadre Alam <mdalam@xxxxxxxxxxxxxx> wrote on Sat, 10 Oct 2020 11:01:37 +0530: > QPIC 2.0 supports Serial NAND support in addition to all features and > commands in QPIC 1.0 for parallel NAND. Parallel and Serial NAND cannot > operate simultaneously. QSPI nand devices will connect to QPIC IO_MACRO > block of QPIC controller. There is a separate IO_MACRO clock for IO_MACRO > block. Default IO_MACRO block divide the input clock by 4. so if IO_MACRO > input clock is 320MHz then on bus it will be 80MHz, so QSPI nand device > should also support this frequency. > > QPIC provides 4 data pins to QSPI nand. In standard SPI mode (x1 mode) data > transfer will occur on only 2 pins one pin for Serial data in and one for > serial data out. In QUAD SPI mode (x4 mode) data transfer will occur at all > the four data lines. QPIC controller supports command for x1 mode and x4 mode. > > Md Sadre Alam (5): > dt-bindings: qcom_nandc: IPQ5018 QPIC NAND documentation > mtd: rawnand: qcom: Add initial support for qspi nand > mtd: rawnand: qcom: Read QPIC version > mtd: rawnand: qcom: Enable support for erase,read & write for serial > nand. > mtd: rawnand: qcom: Add support for serial training. > > .../devicetree/bindings/mtd/qcom_nandc.txt | 3 + > drivers/mtd/nand/raw/nand_ids.c | 13 + > drivers/mtd/nand/raw/qcom_nandc.c | 502 ++++++++++++++++++++- > 3 files changed, 494 insertions(+), 24 deletions(-) > I'm sorry but this series clearly breaks the current layering. I cannot authorize SPI-NAND code to fall into the raw NAND subsystem. As both typologies cannot be used at the same time, I guess you should have another driver handling this feature under the spi/ subsystem + a few declarations in the SPI-NAND devices list. Thanks, Miquèl
