Thanks Doug for the patch.
On 10/14/2020 9:28 PM, Douglas Anderson wrote:
From: Taniya Das <tdas@xxxxxxxxxxxxxx>
In the case where the PLL configuration is lost, then the pm runtime
resume will reconfigure before usage.
Fixes: edab812d802d ("clk: qcom: lpass: Add support for LPASS clock controller for SC7180")
Signed-off-by: Taniya Das <tdas@xxxxxxxxxxxxxx>
Signed-off-by: Douglas Anderson <dianders@xxxxxxxxxxxx>
---
I took the liberty of fixing my own nits that I had with Taniya's
patch, AKA:
https://lore.kernel.org/r/1602614008-2421-2-git-send-email-tdas@xxxxxxxxxxxxxx
Changes in v2:
- Don't needlessly have a 2nd copy of dev_pm_ops and jam it in.
- Check the return value of pm_clk_resume()
- l_val should be unsigned int.
drivers/clk/qcom/lpasscorecc-sc7180.c | 23 ++++++++++++++++++++++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/lpasscorecc-sc7180.c b/drivers/clk/qcom/lpasscorecc-sc7180.c
index 228d08f5d26f..ee23eb5b9bf2 100644
--- a/drivers/clk/qcom/lpasscorecc-sc7180.c
+++ b/drivers/clk/qcom/lpasscorecc-sc7180.c
@@ -356,6 +356,25 @@ static const struct qcom_cc_desc lpass_audio_hm_sc7180_desc = {
.num_gdscs = ARRAY_SIZE(lpass_audio_hm_sc7180_gdscs),
};
+static int lpass_core_cc_pm_clk_resume(struct device *dev)
+{
+ struct regmap *regmap = dev_get_drvdata(dev);
+ unsigned int l_val;
+ int ret;
+
+ ret = pm_clk_resume(dev);
+ if (ret)
+ return ret;
+
+ /* Read PLL_L_VAL */
+ regmap_read(regmap, 0x1004, &l_val);
+ if (!l_val)
+ clk_fabia_pll_configure(&lpass_lpaaudio_dig_pll, regmap,
+ &lpass_lpaaudio_dig_pll_config);
+
+ return 0;
+}
+
static int lpass_core_cc_sc7180_probe(struct platform_device *pdev)
{
const struct qcom_cc_desc *desc;
@@ -373,6 +392,8 @@ static int lpass_core_cc_sc7180_probe(struct platform_device *pdev)
if (IS_ERR(regmap))
return PTR_ERR(regmap);
+ dev_set_drvdata(&pdev->dev, regmap);
+
/*
* Keep the CLK always-ON
* LPASS_AUDIO_CORE_SYSNOC_SWAY_CORE_CLK
@@ -449,7 +470,7 @@ static int lpass_core_sc7180_probe(struct platform_device *pdev)
}
static const struct dev_pm_ops lpass_core_cc_pm_ops = {
- SET_RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL)
+ SET_RUNTIME_PM_OPS(pm_clk_suspend, lpass_core_cc_pm_clk_resume, NULL)
There are two devices and "lpass_hm_core" and the PLL is not part of the
HM_CORE, thus was the reason to separate out the pm_ops.
};
static struct platform_driver lpass_core_cc_sc7180_driver = {
--
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--
